1. Field of the Invention
The invention relates to an output circuit for a bipolar complementary metal oxide semiconductor (BICMOS) obtained by coupling a bipolar transistor with a metal oxide semiconductor, and more particularly, to an output circuit for BICMOS used in the each output terminal of a plurality of logic gates which is the basic element of a logic circuit, to thereby obtain both a low potential state of 0 V (low state) and a high potential state of 5 V (high state).
2. Information Disclosure Statement
Generally, in the prior art BICMOS inverter circuit, as shown in FIG. 1, which is the basic element of BICMOS logic circuit and used in the output terminal of a plurality of logic gates, the circuit comprises a first power supply node N2 connected to a high power supply, a second power supply node N3 connected to a low power supply, a P channel MOS transistor M1 and N channel MOS transistor M2, which are positioned on the path between an input node N1 and an output node N4 and determine logic state, NPN bipolar transistors Q1 and Q2 which are operated as an inverter according to the logic state determined by the MOS transistors M1 and M2, impedances Z1 and Z2 which enable the rapid discharge of the electric charge in the base electrode when transferring the output of the circuit.
The impedances Z1 and Z2 which are connected to MOS transistors M1 and M2 respectively, are configured to operate in the opposite conducting states to the MOS transistors to which the impedances are connected.
Thus, if a high voltage of 5 V is applied to the input node N1, the P channel MOS transistor M1 becomes non-conducting state (OFF), and the P channel MOS transistor M2 becomes conducting state (ON), and the impedance Z1 becomes conducting state or equivalent state, and the impedance Z2 becomes non-conducting state or equivalent state.
Accordingly, the electric charge stored in the base electrode of the bipolar transistor Q1 is discharged through the impedance Z1, thereby it becomes non-conducting state, and the electric charge stored in the condenser Co supplies current, through the N channel MOS transistor M2 with conducting state, to the base electrode of the bipolar transistor Q2, to thereby make the bipolar transistor Q2 conducting state.
Thus, the current which is the product of the base current and the current gain is to the collector-emitter electrode path, and the electric charge in the condenser Co is rapidly discharged, to thereby decrease the potential at the output node N4. Where, the bipolar transistor Q2 becomes non-conducting state upon reduction of current supplied from the condenser by lowering the potential of the condenser to the low potential.
On the other hand, the P channel MOS transistor M1 and impedance Z2 become conducting state upon applying the low voltage of 0 V to the input node N1, thereby the N channel MOS transistor M2 and impedance Z1 become Non-Conducting state.
Accordingly, the electric charge stored in the base electrode of the bipolar transistor Q2 is discharged through the impedance Z2, thereby it becomes non-conducting state, at the same time, the current supplied through the P channel MOS transistor is applied to the base electrode of the bipolar transistor Q1, thereby is becomes conducting state.
Thus, the current larger than the base current by the value of product of the current gain is applied to the collector-emitter electrode path of the bipolar transistor Q1, thereby the condenser Co is charged and the potential at the output node N4 become high.
Next, when the potential becomes the desired high potential by charging the condenser Co, the potential difference between the base electrode and the emitter electrode of the bipolar transistor Q1 becomes small value and Q2 becomes non-conducting state.
However, though the above mentioned prior art BICMOS output circuit has the same power consumption characteristic as the CMOS due to the current being conducted only during the transient time of the output, and has a more rapid transient time than that of the CMOS due to the large current supplied from the bipolar transistors Q1 and Q2 when Co is large there is a disadvantage in that the prior art BICMOS output circuit has the logic level voltage of 0.5 V and 4.5 V instead of the full swing logic level voltage of 0 V and 5 V, because the current is conducted only during the transient time like CMOS and the bipolar transistors Q1 and Q2 used as the last output terminal are non-conducting state, which has the potential difference between the base electrode and the emitter electrode thereby about 0.5 V.
Accordingly, though, there is no problem, when the prior art BICMOS output circuit is used in the IC internal circuit, there is problem that the undesired operation is occurred due to the decrease of the noise margin at the each input and output terminal, when it is used with TTL circuit.
Therefore, it is an object of the present invention to privide an output circuit for BICMOS which has a logic level change of full swing between 0 V and 5 V.